School of Engineering Computer Engineering MASC
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Publications

2017
2016
2015
2013
2012
2011
2010
2009
2008
  • Understanding bug fix patterns in verilog, Sangeetha Sudakrishnan, Janaki T. Madhavan, E. James Whitehead Jr., Jose Renau, Fith International Workshop on Mining Software Repositories, May 2008.
  • Implementation of a Power Efficient High Performance FPU for SCOORE, Wael Ali Ashmawi, John Burr, Abhishek Sharma, Jose Renau, Workshop on Architectural Research Prototyping (WARP), held inconjunction with ISCA-35, June 2008.
  • Measuring Power and Temperature from Real Processors, Francisco-Javier Mesa-Martinez, Michael Brown, Joseph Nayfach-Battilana, Jose Renau, The Next Generation Software (NGS) Workshop (NGS08) held in conjunction with IPDPS, April 2008.
  • uDSim, a Microprocessor Design Time Simulation Infrastructure. Sangeetha Sudhakrishnan, Francisco-Javier Mesa-Martinez, Jose Renau, Wild and Crazy Ideas VI (WACI) held in conjunction with ASPLOS, March 2008.
  • Processor Verification with hwBugHunt, Sangeetha Sudhakrishnan, Liying Su, and Jose Renau, IEEE International Symposium on Quality Electronic Design (ISQED), March 2008.
  • System and Processor Design Effort Estimation, Cyrus Bazeghi, Francisco J. Mesa-Martinez, and Jose Renau, Springer Research Trends in VLSI and Systems on Chip.
2007
2006
2005
2004
2003
2002
2001
2000