ESESC is used by the ISLPED 2012 paper Thermal-Aware Sampling in Architectural Simulation by Ehsan K.Ardestani, Elnaz Ebrahimi, Gabriel Southern, and Jose Renau explains how to perform thermal sampling with ESESC for a single core configuration.
Abstract
Thermal behavior of modern processors is a first-order design constraint. However, accurate estimation of thermal behavior is time consuming, and techniques for accelerating performance simulations often yield inaccurate results when directly applied to thermal simulation, or do not reduce the thermal computation at all. This paper is the first to propose thermal sampling techniques. It can be integrated with existing phase-based and statistical-based architectural simulator sampling. The resulting simulator can perform accurate performance, power, and thermal characterization at close to 30 MIPS, on average, instead of 5 MIPS for the fastest sampling technique without thermal-aware.